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RTL Template

The RTL template is used to define which insns match the particular pattern and how to find their operands. For named patterns, the RTL template also says how to construct an insn from specified operands.

Construction involves substituting specified operands into a copy of the template. Matching involves determining the values that serve as the operands in the insn being matched. Both of these activities are controlled by special expression types that direct matching and substitution of the operands.

(match_operand:m n predicate constraint)
This expression is a placeholder for operand number n of c_215.html">last section, table of contents.


Everything about Instruction Patterns

Each instruction pattern contains an incomplete RTL expression, with pieces to be filled in later, operand constraints that restrict how the pieces can be filled in, and an output pattern or C code to generate the assembler output, all wrapped up in a define_insn expression.

A define_insn is an RTL expression containing four or five operands:

  1. An optional name. The presence of a name indicate that this instruction pattern can perform a certain standard job for the RTL-generation pass of the compiler. This pass knows certain names and will use the instruction patterns with those names, if the names are defined in the machine description. The absence of a name is indicated by writing an empty string where the name should go. Nameless instruction patterns are never used for generating RTL code, but they may permit several simpler insns to be combined later on. Names that are not thus known and used in RTL-generation have no effect; they are equivalent to no name at all.
  2. The RTL template (see section RTL Template) is a vector of incomplete RTL expressions which show what the instruction should look like. It is incomplete because it may contain match_operand, match_operator, and match_dup expressions that stand for operands of the instruction. If the vector has only one element, that element is the template for the instruction pattern. If the vector has multiple elements, then the instruction pattern is a parallel expression containing the elements described.
  3. A condition. This is a string which contains a C expression that is the final test to decide whether an insn body matches this pattern. For a named pattern, the condition (if present) may not depend on the data in the insn being matched, but only the target-machine-type flags. The compiler needs to test these conditions during initialization in order to learn exactly which named instructions are available in a particular run. For nameless patterns, the condition is applied only when matching an individual insn, and only after the insn has matched the pattern's recognition template. The insn's operands may be found in the vector operands.
  4. The output template: a string that says how to output matching insns as assembler code. `%' in this string specifies where to substitute the value of an operand. See section Output Templates and Operand Substitution. When simple substitution isn't general enough, you can specify a piece of C code to compute the output. See section C Statements for Assembler Output.
  5. Optionally, a vector containing the values of attributes for insns matching this pattern. See section Instruction Attributes.


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Example of define_insn

Here is an actual example of an instruction pattern, for the 68000/68020.

(define_insn "tstsi"
  [(set (cc0)
        (match_operand:SI 0 "general_operand" "rm"))]
  ""
  "*
{ if (TARGET_68020 || ! ADDRESS_REG_P (operands[0]))
    return \"tstl %0\";
  return \"cmpl #0,%0\"; }")

This is an instruction that sets the condition codes based on the value of a general operand. It has no condition, so any insn whose RTL description has the form shown may be handled according to this pattern. The name `tstsi' means "test a SImode value" and tells the RTL generation pass that, when it is necessary to test such a value, an insn to do so can be constructed using this pattern.

The output control string is a piece of C code which chooses which output template to return based on the kind of operand and the specific type of CPU for which code is being generated.

`"rm"' is an operand constraint. Its meaning is explained below.


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RTL Template

The RTL template is used to define which insns match the particular pattern and how to find their operands. For named patterns, the RTL template also says how to construct an insn from specified operands.

Construction involves substituting specified operands into a copy of the template. Matching involves determining the values that serve as the operands in the insn being matched. Both of these activities are controlled by special expression types that direct matching and substitution of the operands.

(match_operand:m n predicate constraint)
This expression is a placeholder for operand number n of c_215.html">last section, table of contents.


Everything about Instruction Patterns

Each instruction pattern contains an incomplete RTL expression, with pieces to be filled in later, operand constraints that restrict how the pieces can be filled in, and an output pattern or C code to generate the assembler output, all wrapped up in a define_insn expression.

A define_insn is an RTL expression containing four or five operands:

  1. An optional name. The presence of a name indicate that this instruction pattern can perform a certain standard job for the RTL-generation pass of the compiler. This pass knows certain names and will use the instruction patterns with those names, if the names are defined in the machine description. The absence of a name is indicated by writing an empty string where the name should go. Nameless instruction patterns are never used for generating RTL code, but they may permit several simpler insns to be combined later on. Names that are not thus known and used in RTL-generation have no effect; they are equivalent to no name at all.
  2. The RTL template (see section RTL Template) is a vector of incomplete RTL expressions which show what the instruction should look like. It is incomplete because it may contain match_operand, match_operator, and match_dup expressions that stand for operands of the instruction. If the vector has only one element, that element is the template for the instruction pattern. If the vector has multiple elements, then the instruction pattern is a parallel expression containing the elements described.
  3. A condition. This is a string which contains a C expression that is the final test to decide whether an insn body matches this pattern. For a named pattern, the condition (if present) may not depend on the data in the insn being matched, but only the target-machine-type flags. The compiler needs to test these conditions during initialization in order to learn exactly which named instructions are available in a particular run. For nameless patterns, the condition is applied only when matching an individual insn, and only after the insn has matched the pattern's recognition template. The insn's operands may be found in the vector operands.
  4. The output template: a string that says how to output matching insns as assembler code. `%' in this string specifies where to substitute the value of an operand. See section Output Templates and Operand Substitution. When simple substitution isn't general enough, you can specify a piece of C code to compute the output. See section C Statements for Assembler Output.
  5. Optionally, a vector containing the values of attributes for insns matching this pattern. See section Instruction Attributes.


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